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Cisco Bug: CSCvv87344 - asr920 not getting phase aligned on reboot

Last Modified

Sep 28, 2020

Products (1)

  • Cisco ASR 920 Series Aggregation Services Router

Known Affected Releases

17.3.1

Description (partial)

Symptom:
asr920 router not getting phase aligned

GM has been selected
clock state is FREQ_LOCKED
ptp stream stat displays ~epich time for Offset from master and Reverse Path Delay

r6-asr920-12sz#sh pl so pt for dom 24
PTPd Foreign Master Information:

Current Master: TP-2-UP

Port: TP-2-UP
  GM Clock Identity: 0x00:B0:AE:FF:FE:01:1C:A3
  Clock Stream Id: 4
  Priority1: 128
  Priority2: 10
  Local Priority: 1
  Clock Quality:
    Class: 6
    Accuracy: Within 100ns
    Offset (Log Variance): 0x4E5D
  Source Port Identity:
    Clock Identity: 0x00:B0:AE:FF:FE:01:1C:A3
    Port Number: 1
  Steps Removed: 1
  masterOnly: FALSE
  Qualified: TRUE


yet clock state is FREQ_LOCKED


r6-asr920-12sz#sh ptp cloc run 



                      PTP Boundary Clock [Domain 24] [Hybrid]

         State          Ports          Pkts sent      Pkts rcvd      Redundancy Mode

         FREQ_LOCKED  5              37804          20133          Hot standby

                               PORT SUMMARY
                                                                          PTP Master
Name     Tx Mode      Role         Transport    State        Sessions     Port Addr

R3-INTRA mcast        negotiated   Ethernet     Master       1            UNKNOWN
R10-DOWN mcast        master       Ethernet     Master       1            -
R14-DOWN mcast        master       Ethernet     Master       1            -
GM2-UP   mcast        negotiated   Ethernet     Master       1            UNKNOWN
TP-2-UP  mcast        negotiated   Ethernet     Slave        1            UNKNOWN



r6-asr920-12sz#sh pl so pt st st 4 | sec Current
Current Data Set 
  Offset from master :  -0.000000003         << 1601042628
  Mean Path Delay    :  +0.000000013 
  Forward Path Delay :  +0.000000012 
  Reverse Path Delay :  +0.000000014       << 1601042628
  Steps Removed 1

Conditions:
using G.8275.1 FTS profile and min-clock-class 165 configured
seen on ASR-920-12SZ-IM
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