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Cisco Bug: CSCuq54655 - ASR1K: Ucode@PAR1_CSR32_PAR1_ERR_LEAF_INT__INT_PAR1_STEM_CB_SEL_INV_ERR

Last Modified

Feb 21, 2018

Products (1)

  • Cisco ASR 1000 Series Aggregation Services Routers

Known Affected Releases

15.5(1)S

Description (partial)

This issue exists in all released images for the ESP100/200, ASR1002-X and ASR1001-X.

Symptom:
The ESP 100/200/ASR1002-x/ASR1001-x could crash due to a hardware interrupt caused by packet ordering issue while moving queues with have traffic in the background.

Conditions:
The issue occurs while processing a scheduling clock update as a result of changing the slowest entry in that scheduling node. An example is a GE scheduling node with more than 128 queues where each queue represents a vlan. If a new vlan with a single queue flat policy and the slowest real time rate, i.e. min or max,  among all vlans, the GE scheduling clock is adjusted to reflect the slowest rate in order to achieve the highest scheduling accuracy. The issue occurs while moving the queues from the old scheduling node to the new scheduling node.

Without ESP redundancy the crash causes service outage while the ESP reloads.
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