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Cisco Bug: CSCuq50234 - Interface plot of LAG with failed member port

Last Modified

Jun 27, 2016

Products (1)

  • Cisco MATE Design

Known Affected Releases


Description (partial)

Interface plot has the red line drawn over the active part of the LAG.  It should be drawn over the inactive part of the LAG as is shown in Design's plot.

Show interface plot for a LAG.  Fail a member port.
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