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Cisco Bug: CSCuq01572 - ASR1K:SPA-4XT-SERIAL System hang due to zero clock on DTE

Last Modified

Sep 17, 2019

Products (1)

  • Cisco ASR 1000 Series Aggregation Services Routers

Known Affected Releases


Description (partial)

System hangs when QFP memory is exhausted due to buffer build up at interface level and SIp level.

When any ports on the serial spa present on the chassis are connected to a remote equipment that is not transmitting any clock (This can be verified by the command "show controller serial <slot/subslot/port>" then this may result in buffer fill up at interface level and SIP level.

When the output of teh above command displays 0 rx clock and the interface is admin up state(protocol down) then there is a risk of buffer build up.

This is applicable only for the SPA SPA-4XT-SERIAL. and no other SPAs.
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