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Cisco Bug: CSCuo36432 - Default mode clock interface loopback detection doesn't work

Last Modified

Jul 20, 2018

Products (7)

  • Cisco ASR 9000 Series Aggregation Services Routers
  • Cisco ASR 9922 Router
  • Cisco IOS XR Software
  • Cisco ASR 9010 Router
  • Cisco ASR 9006 Router
  • Cisco ASR 9001 Router
  • Cisco ASR 9912 Router

Known Affected Releases

5.2.0.BASE

Description (partial)

Symptom:
Default mode - clock interface loopback detection does not work.  clock-interface bits-in should have been flagged as loopback when the SSM QL rx from the synce line input which driving the clock-interface bits-out is the same as the bits-in SSM QL rx.

Conditions:
- SW: R5.2.0 ? 19i Image (asr9k-mini-px-5.2.0.19I)
- HW: RSP4 (A9K-RSP880-SE) 
- PI frequency synchronization is in default mode
- Clock Interface BITS-IN, clock interface BITS-OUT, Synce selection input configured and have the same SSM QL values.
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Bug Details Include

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  • Status
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