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Cisco Bug: CSCsz78510 - Ingress Test SPI4 FIFO Error

Last Modified

Nov 29, 2017

Products (1)

  • Cisco Carrier Routing System

Known Affected Releases


Description (partial)

In the below Ingress Test SPI4 FIFO Definitions I always see the Address[44:37] as 0x01 no matter which channel i send the packet on. See example below for CLI      0x2 - Ingress Input to SPI4 Core Interface (0x700 = 0x206)
cpu_data [63:46] - unused 
cpu_data [45] - Valid - indications when data is valid
cpu_data [44:37] - Address - indicates the spi4 address that data is to be sent on.
cpu_data [36] - SOP - Start of Packet
cpu_data [35] - EOP - End of Packet
cpu_data [34] - ERR - Error indication - only valid with EOP
cpu_data [33:32] - Mod - indicates which bytes are valid in Data
cpu_data [31:0] - Data

This behavior is always observed.
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